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| PDH 标准的 E3次群测试序列发生器的 FPGA 设计 |
| Test Sequence Generator of E3 Group with PDH Standard Designed by FPGA |
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| DOI： |
| 中文关键词: PDH E3 测试序列发生器 FPGA |
| 英文关键词: PDH E3 Test sequence generator FPGA |
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| 中文摘要: |
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| 英文摘要: |
| In order to improve the reliability and the diversity of function of E 3 group signal communication equipment with PDH standard, we designed a test sequence generator system based on FPGA device .In the whole process of design , we completed the implementation of hardware and the design of each function module of test system , which mainly included the system control mod-ule , PRBS generation module , error code generation module and HDB 3 code conversion module .Using SignalTap II Logic Analy-zer module embedded in Quartus II software for real -time testing of the sequence generator , the result is more accurate .The se-quence generator can complete the basic tasks required to test , so it has certain practical value to design the test system . |
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